Quantum SDLT 320 User Manual Page 106

  • Download
  • Add to my manuals
  • Print
  • Page
    / 150
  • Table of contents
  • TROUBLESHOOTING
  • BOOKMARKS
  • Rated. / 5. Based on customer reviews
Page view 105
CHAPTER 6: SCSI Description SDLT 220 and SDLT 320 Product Manual
6-10 March 2004 81-85002-01
6.6.2 Signal Bus Timing
The ANSI SCSI-2 standard defines the SCSI bus timing values listed in Table 6-5.
Table 6-5. SCSI Bus Timing Values
Timing Description Value Description
Arbitration Delay 2.4 µs Minimum time a SCSI device waits from asserting BSY for
arbitration until the DATA BUS can be examined to see if
arbitration has been won; there is no maximum time.
Assertion Period 90 ns Minimum time a drive asserts REQ while using synchronous
data transfers; also, the minimum time that an initiator asserts
ACK while using synchronous data transfers.
Bus Clear Delay 800 ns Maximum time for a SCSI device to stop driving all bus signals
after:
1. BUS FREE is detected.
2. SEL is received from another SCSI device during
ARBITRATION.
3. Transition of RST to true.
For condition 1, the maximum time for a SCSI device to clear the
bus is 1200 ns (1.2 µs) from BSY and SEL first becoming both
false.
If a SCSI device requires more than a bus settle delay to detect
BUS FREE, it clears the bus within a bus clear delay minus the
excess time.
Bus Free Delay 800 ns Maximum time a SCSI device waits from its detection of BUS
FREE until its assertion of BSY when going to ARBITRATION.
Bus Set Delay 1.8 µs Maximum time for a device to assert BSY and its SCSI ID bit on
the DATA BUS after it detects BUS FREE to enter
ARBITRATION.
Bus Settle Delay 400 ns Minimum time to wait for the bus to settle after changing certain
control signals as called out in the protocol definitions.
Cable Skew Delay 10 ns Maximum difference in propagation time allowed between any
two SCSI bus signals measured between any two SCSI devices.
Data Release Delay 400 ns Maximum time for an initiator to release the DATA BUS signals
following the transition of the I/O signal from false to true.
Deskew Delay 45 ns Minimum time required to wait for all signals (especially data
signals) to stabilize at their correct, final value after changing.
Page view 105
1 2 ... 101 102 103 104 105 106 107 108 109 110 111 ... 149 150

Comments to this Manuals

No comments